A9.2 - Introduction of Smart Hi-Speed Airborne Camera with Embedded Real-Time Tracking Algorithm for Store Separation Flight Tests
- Event
- ETTC 2024 - European Test and Telemetry Conference
2024-06-11 - 2024-06-13
Nuremberg - Chapter
- Imaging & Video
- Author(s)
- R. de Paulo, N. Leite, L. Sousa - Instituto de Pesquisas e Ensaios em Voo (IPEV), São José dos Campos (Brazil), D. Loubach - Instituto Tecnológico de Aeronáutica (ITA), São José dos Campos (Brazil)
- Pages
- 130 - 136
- DOI
- 10.5162/ETTC2024/A9.2
- ISBN
- 978-3-910600-02-7
- Price
- free
Abstract
For efficiency and flight safety improvement in Store Separation Flight Testing (SSFT) IPEV´s R&D efforts over the past 10 years were focused on the development and validation of an Airborne Real-Time Optical Tracking System (SisTrO), to provide the ejected store Time-Space Position Information (TSPI) in real-time and expressed in 6 Degrees-of-Freedom (6DoF) parameters (i.e., 3-D Linear and Angular Displacement). The current SisTrO architecture employs Hi-Speed airborne cameras connected to a tracking processor through the CoaXPress (CXP-12) interface. The recent introduction of airborne hi-speed cameras where the users can integrate their own application into the camera FPGA, opens new frontiers where the tracking algorithm is embedded into the camera processing unit, making possible the development of “Hi-Speed airborne smart cameras” to be used in flight testing, such as SSFT campaigns to provide a real-time efficient solution in a smaller form factor. Furthermore, using Perspective-n-Point techniques opens new frontiers for developing an advanced algorithm to compute the 3D 6DoF trajectory parameters with sufficient accuracy from a single camera and therefore to improve SisTrO reliability and in a smaller form factor. Given this context, the present paper evaluates the implementation of different tracking algorithms in CPU/GPU used in SisTrO I/II with the new small-factor FPGA hardware architecture. The evaluation parameters are real-time performance (i.e., execution time), object tracking effectiveness, and operational environment (flight tests). Results show that while the SisTrO CPU/GPU architecture has better computation performance, the FPGA can execute the tracking algorithms fulfilling the real-time constraints with reduced form factor and weight.