P28 - Self-Consistent Determination of Interface and Bulk Parameters of Oxide/Si/SiGe/Si Layer Stacks by Means of Simultaneous Measurement of Gate Current and High Frequency Gate Capacitance in Non-Steady State Non-Equilibrium

Event
iCCC2024 - iCampµs Cottbus Conference
2024-05-14 - 2024-05-16
Cottbus
Band
Poster
Chapter
Material- & Prozesstechnologien und Lab-on-Chip
Author(s)
R. Sorge, W. Wen, M. Lisker, Y. Yamamoto - IHP - Leibniz-Institut für innovative Mikroelektronik, Frankfurt/Oder , N. Inomata - Tohoku University, Sendai (Japan)
Pages
207 - 210
DOI
10.5162/iCCC2024/P28
ISBN
978-3-910600-00-3
Price
free

Abstract

Heteroepitaxy of group IV materials (Si, SiGe, and Ge) has great potential for novel Si-based sensor devices. We report on a self-consistent extraction of surface and bulk MOS parameters for the optimization of the growth parameters of epitaxial Si/SiGe/Si-layer stacks used for strain sensor applications. Beside the MOS surface and bulk parameters such as interface state density Dit(Et) and the generation lifetime τg(xg) Irec,gen(∆ѱs) rapid simultaneous measurements of Ig(Vg) and Chf(Vg) in non-steady state non-equilibrium enable the extraction of the current voltage characteristic Irec,gen(s) of the field induced pn junction for the optimization of growth conditions of the low temperature LPCVD epitaxy process considered in this study. An appropriate choice of sample temperature and gate voltage ramp rate enables a convenient adjustment of the desired non-steady state non-equilibrium for the measurements.

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